Device density in integrated circuits (ICs) is constantly being increased. To enable the increase in density, device dimensions are being reduced. As the dimensions of device contacts get smaller, device contact resistance increases, and device performance is adversely affected. Methods for decreasing device contact resistance in ICs are needed to obtain enhanced device and IC performance.
Device contacts with reduced resistance may be created by forming certain metals on a silicon semiconductor base layer. These metals react with the underlying silicon, for example, to form silicides. Silicide device contacts are desirable because they reduce the native oxide on silicon. The native oxide is undesirable because it increases the contact resistance.
Titanium is preferably used to form silicide device contacts for two reasons. First, titanium silicide has superior gettering qualities. Also, titanium silicide forms low resistance contacts on both polysilicon and single-crystal silicon.
Device contacts are normally formed with the following process. First, a thin layer of titanium is formed on top of the silicon base layer, such as a substrate. The titanium adjoins active regions exposed by contact holes in an isolating layer, such as an oxide, above the silicon base layer. Then, the silicon base layer is annealed. As a result, the titanium reacts with the active regions of silicon to form titanium silicide.
Ultimately, an electrically conductive plug material, such as tungsten, fills the contact hole to facilitate external electrical connection to the contact. However, plug materials, such as tungsten, adhere poorly to titanium silicide. Additionally, to ensure low contact resistivity, aluminum or polysilicon plug materials should not be intermixed with the titanium silicide and underlying silicon base layer. Accordingly, a barrier layer is formed over the titanium silicide to prevent diffusion of the titanium silicide and silicon base layer into the plug material. The barrier layer also causes the plug material to adhere to the IC.
Titanium nitride is a desirable barrier layer because it is an impenneable barrier for silicon, and because the activation energy required for the diffusion of other impurities is very high. Titanium nitride is also chemically and thermodynamically stable, and has a relatively low resistivity. Titanium nitride can be formed on the substrate by (1) evaporating titanium in a nitrogen ambient, (2) reactively sputtering titanium in an argon and nitrogen mixture, (3) sputtering from a titanium nitride target in an inert argon ambient, (4) sputter depositing titanium in an argon ambient, and converting the titanium to titanium nitride subsequently by plasma nitridation, or (5) low pressure chemical vapor deposition (CVD).
The resistance of device contacts can also be adversely increased by the formation of titanium silicide having small step coverage in the contact hole. As device dimensions shrink, the contact holes become relatively deeper and narrower. Also, the walls of the contact holes become steeper, and closer to vertical. As a result, most metal deposition techniques form conductive layers having relatively small step coverage. As a result, a void, or keyhole, forms in the plug material. The void increases contact resistivity and diminishes contact reliability. Hence, IC performance is degraded. Thus, there is a need for forming contacts with reduced resistivity. Specifically, there is a need for a method of forming contacts without voids.